Voltage Amplification Help

Introduction

The graph in Fig. 16-11 shows the drain (channel) current, I _D as a function of the gate bias voltage E _G for a hypothetical n -channel JFET when no signal is applied to the gate electrode. The drain voltage E _D is assumed to be constant.

Fig. 16-11 . Relative drain current as a function of gate voltage in a hypothetical n -channel JFET.

When E _G is fairly large and negative, the JFET is pinched off, and no current flows through the channel. As E _G gets less negative, the channel opens up, and current begins flowing. As E _G gets still less negative, the channel gets wider, and the current I _D increases. As E _G approaches the point where the source-gate ( S-G ) junction is at forward breakover, the channel conducts as well as it possibly can. If E _G becomes positive enough so that the S-G junction conducts, the JFET no longer works properly. Some of the current in the channel is shunted through the gate. This is like a garden hose springing a leak.

The best amplification for weak signals is obtained when E _G is such that the slope of the curve in Fig. 16-11 is steepest. This is shown roughly by the range marked X in the graph. For power amplification, results are often best when the JFET is biased at or beyond pinchoff, in the range marked Y .

Drain Current Versus Drain Voltage

Drain current I _D can be plotted as a function of drain voltage E _D for various values of gate bias voltage E _G . The resulting set of curves is called a family of characteristic curves for the device. Figure 16-12 shows a family of characteristic curves for a hypothetical n -channel JFET. Also of importance is the curve of I _D versus E _G , one example of which is shown in Fig. 16-11.

Fig. 16-12 . A family of characteristic curves for a hypothetical n -channel JFET.

Transconductance

Look back for a moment at the discussion of dynamic current amplification for bipolar transistors earlier in this chapter. The JFET analog of this is called dynamic mutual conductance or transconductance .

Refer to Fig. 16-11. Suppose that E _G is a certain value, with a corresponding I _D that flows as a result. If the gate voltage changes by a small amount Δ E _G , then the drain current also will change by a certain increment Δ I _D . The transconductance is the ratio Δ I _D /Δ E _G . Geometrically, this translates to the slope of a line tangent to the curve of Fig. 16-11 at some point.

The value of Δ I _D /Δ E _G is not the same everywhere along the curve. When the JFET is biased beyond pinchoff, as in the region marked Y in Fig. 16-11, the slope of the curve is zero. There is no drain current, even if the gate voltage changes. Only when the channel conducts some current will there be a change in I _D when there is a change in E _G . The region where the transconductance is the greatest is the region marked X , where the slope of the curve is steepest. This is where the most amplification can be obtained. A small change in E _G produces a large change in I _D , which in turn causes a large variation in a resistive load placed in series with the line connecting the drain to the power supply.